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PKg[»íÐÈpoll.hnuW+A„¶#include PKg[,®”Ñfcntl.hnuW+A„¶#include PKg[ÚŸY–sigcontext.hnuW+A„¶#ifndef _ASM_X86_SIGCONTEXT_H #define _ASM_X86_SIGCONTEXT_H #include #define FP_XSTATE_MAGIC1 0x46505853U #define FP_XSTATE_MAGIC2 0x46505845U #define FP_XSTATE_MAGIC2_SIZE sizeof(FP_XSTATE_MAGIC2) /* * bytes 464..511 in the current 512byte layout of fxsave/fxrstor frame * are reserved for SW usage. On cpu's supporting xsave/xrstor, these bytes * are used to extended the fpstate pointer in the sigcontext, which now * includes the extended state information along with fpstate information. * * Presence of FP_XSTATE_MAGIC1 at the beginning of this SW reserved * area and FP_XSTATE_MAGIC2 at the end of memory layout * (extended_size - FP_XSTATE_MAGIC2_SIZE) indicates the presence of the * extended state information in the memory layout pointed by the fpstate * pointer in sigcontext. */ struct _fpx_sw_bytes { __u32 magic1; /* FP_XSTATE_MAGIC1 */ __u32 extended_size; /* total size of the layout referred by * fpstate pointer in the sigcontext. */ __u64 xstate_bv; /* feature bit mask (including fp/sse/extended * state) that is present in the memory * layout. */ __u32 xstate_size; /* actual xsave state size, based on the * features saved in the layout. * 'extended_size' will be greater than * 'xstate_size'. */ __u32 padding[7]; /* for future use. */ }; #ifdef __i386__ /* * As documented in the iBCS2 standard.. * * The first part of "struct _fpstate" is just the normal i387 * hardware setup, the extra "status" word is used to save the * coprocessor status word before entering the handler. * * Pentium III FXSR, SSE support * Gareth Hughes , May 2000 * * The FPU state data structure has had to grow to accommodate the * extended FPU state required by the Streaming SIMD Extensions. * There is no documented standard to accomplish this at the moment. */ struct _fpreg { unsigned short significand[4]; unsigned short exponent; }; struct _fpxreg { unsigned short significand[4]; unsigned short exponent; unsigned short padding[3]; }; struct _xmmreg { unsigned long element[4]; }; struct _fpstate { /* Regular FPU environment */ unsigned long cw; unsigned long sw; unsigned long tag; unsigned long ipoff; unsigned long cssel; unsigned long dataoff; unsigned long datasel; struct _fpreg _st[8]; unsigned short status; unsigned short magic; /* 0xffff = regular FPU data only */ /* FXSR FPU environment */ unsigned long _fxsr_env[6]; /* FXSR FPU env is ignored */ unsigned long mxcsr; unsigned long reserved; struct _fpxreg _fxsr_st[8]; /* FXSR FPU reg data is ignored */ struct _xmmreg _xmm[8]; unsigned long padding1[44]; union { unsigned long padding2[12]; struct _fpx_sw_bytes sw_reserved; /* represents the extended * state info */ }; }; #define X86_FXSR_MAGIC 0x0000 /* * User-space might still rely on the old definition: */ struct sigcontext { unsigned short gs, __gsh; unsigned short fs, __fsh; unsigned short es, __esh; unsigned short ds, __dsh; unsigned long edi; unsigned long esi; unsigned long ebp; unsigned long esp; unsigned long ebx; unsigned long edx; unsigned long ecx; unsigned long eax; unsigned long trapno; unsigned long err; unsigned long eip; unsigned short cs, __csh; unsigned long eflags; unsigned long esp_at_signal; unsigned short ss, __ssh; struct _fpstate *fpstate; unsigned long oldmask; unsigned long cr2; }; #else /* __i386__ */ /* FXSAVE frame */ /* Note: reserved1/2 may someday contain valuable data. Always save/restore them when you change signal frames. */ struct _fpstate { __u16 cwd; __u16 swd; __u16 twd; /* Note this is not the same as the 32bit/x87/FSAVE twd */ __u16 fop; __u64 rip; __u64 rdp; __u32 mxcsr; __u32 mxcsr_mask; __u32 st_space[32]; /* 8*16 bytes for each FP-reg */ __u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg */ __u32 reserved2[12]; union { __u32 reserved3[12]; struct _fpx_sw_bytes sw_reserved; /* represents the extended * state information */ }; }; /* * User-space might still rely on the old definition: */ struct sigcontext { unsigned long r8; unsigned long r9; unsigned long r10; unsigned long r11; unsigned long r12; unsigned long r13; unsigned long r14; unsigned long r15; unsigned long rdi; unsigned long rsi; unsigned long rbp; unsigned long rbx; unsigned long rdx; unsigned long rax; unsigned long rcx; unsigned long rsp; unsigned long rip; unsigned long eflags; /* RFLAGS */ unsigned short cs; unsigned short gs; unsigned short fs; unsigned short __pad0; unsigned long err; unsigned long trapno; unsigned long oldmask; unsigned long cr2; struct _fpstate *fpstate; /* zero when no FPU context */ unsigned long reserved1[8]; }; #endif /* !__i386__ */ struct _xsave_hdr { __u64 xstate_bv; __u64 reserved1[2]; __u64 reserved2[5]; }; struct _ymmh_state { /* 16 * 16 bytes for each YMMH-reg */ __u32 ymmh_space[64]; }; /* * Extended state pointed by the fpstate pointer in the sigcontext. * In addition to the fpstate, information encoded in the xstate_hdr * indicates the presence of other extended state information * supported by the processor and OS. */ struct _xstate { struct _fpstate fpstate; struct _xsave_hdr xstate_hdr; struct _ymmh_state ymmh; /* new processor state extensions go here */ }; #endif /* _ASM_X86_SIGCONTEXT_H */ PKg[Ë›errno.hnuW+A„¶#include PKg[MZT !! termios.hnuW+A„¶#include PKg[M‡ÊI kvm_para.hnuW+A„¶#ifndef _ASM_X86_KVM_PARA_H #define _ASM_X86_KVM_PARA_H #include #include /* This CPUID returns the signature 'KVMKVMKVM' in ebx, ecx, and edx. It * should be used to determine that a VM is running under KVM. */ #define KVM_CPUID_SIGNATURE 0x40000000 /* This CPUID returns a feature bitmap in eax. Before enabling a particular * paravirtualization, the appropriate feature bit should be checked. */ #define KVM_CPUID_FEATURES 0x40000001 #define KVM_FEATURE_CLOCKSOURCE 0 #define KVM_FEATURE_NOP_IO_DELAY 1 #define KVM_FEATURE_MMU_OP 2 /* This indicates that the new set of kvmclock msrs * are available. The use of 0x11 and 0x12 is deprecated */ #define KVM_FEATURE_CLOCKSOURCE2 3 #define KVM_FEATURE_STEAL_TIME 5 #define KVM_FEATURE_PV_EOI 6 /* The last 8 bits are used to indicate how to interpret the flags field * in pvclock structure. If no bits are set, all flags are ignored. */ #define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24 #define MSR_KVM_WALL_CLOCK 0x11 #define MSR_KVM_SYSTEM_TIME 0x12 #define KVM_MSR_ENABLED 1 /* Custom MSRs falls in the range 0x4b564d00-0x4b564dff */ #define MSR_KVM_WALL_CLOCK_NEW 0x4b564d00 #define MSR_KVM_SYSTEM_TIME_NEW 0x4b564d01 #define MSR_KVM_STEAL_TIME 0x4b564d03 #define MSR_KVM_PV_EOI_EN 0x4b564d04 struct kvm_steal_time { __u64 steal; __u32 version; __u32 flags; __u32 pad[12]; }; #define KVM_STEAL_ALIGNMENT_BITS 5 #define KVM_STEAL_VALID_BITS ((-1ULL << (KVM_STEAL_ALIGNMENT_BITS + 1))) #define KVM_STEAL_RESERVED_MASK (((1 << KVM_STEAL_ALIGNMENT_BITS) - 1 ) << 1) #define KVM_MAX_MMU_OP_BATCH 32 /* Operations for KVM_HC_MMU_OP */ #define KVM_MMU_OP_WRITE_PTE 1 #define KVM_MMU_OP_FLUSH_TLB 2 #define KVM_MMU_OP_RELEASE_PT 3 /* Payload for KVM_HC_MMU_OP */ struct kvm_mmu_op_header { __u32 op; __u32 pad; }; struct kvm_mmu_op_write_pte { struct kvm_mmu_op_header header; __u64 pte_phys; __u64 pte_val; }; struct kvm_mmu_op_flush_tlb { struct kvm_mmu_op_header header; }; struct kvm_mmu_op_release_pt { struct kvm_mmu_op_header header; __u64 pt_phys; }; #define KVM_PV_EOI_BIT 0 #define KVM_PV_EOI_MASK (0x1 << KVM_PV_EOI_BIT) #define KVM_PV_EOI_ENABLED KVM_PV_EOI_MASK #define KVM_PV_EOI_DISABLED 0x0 #endif /* _ASM_X86_KVM_PARA_H */ PKg[V(,077msr.hnuW+A„¶#ifndef _ASM_X86_MSR_H #define _ASM_X86_MSR_H #include #ifndef __ASSEMBLY__ #include #include #define X86_IOC_RDMSR_REGS _IOWR('c', 0xA0, __u32[8]) #define X86_IOC_WRMSR_REGS _IOWR('c', 0xA1, __u32[8]) #endif /* __ASSEMBLY__ */ #endif /* _ASM_X86_MSR_H */ PKg[øî! ioctls.hnuW+A„¶#include PKg[Ná9p stat.hnuW+A„¶#ifndef _ASM_X86_STAT_H #define _ASM_X86_STAT_H #define STAT_HAVE_NSEC 1 #ifdef __i386__ struct stat { unsigned long st_dev; unsigned long st_ino; unsigned short st_mode; unsigned short st_nlink; unsigned short st_uid; unsigned short st_gid; unsigned long st_rdev; unsigned long st_size; unsigned long st_blksize; unsigned long st_blocks; unsigned long st_atime; unsigned long st_atime_nsec; unsigned long st_mtime; unsigned long st_mtime_nsec; unsigned long st_ctime; unsigned long st_ctime_nsec; unsigned long __unused4; unsigned long __unused5; }; #define STAT64_HAS_BROKEN_ST_INO 1 /* This matches struct stat64 in glibc2.1, hence the absolutely * insane amounts of padding around dev_t's. */ struct stat64 { unsigned long long st_dev; unsigned char __pad0[4]; unsigned long __st_ino; unsigned int st_mode; unsigned int st_nlink; unsigned long st_uid; unsigned long st_gid; unsigned long long st_rdev; unsigned char __pad3[4]; long long st_size; unsigned long st_blksize; /* Number 512-byte blocks allocated. */ unsigned long long st_blocks; unsigned long st_atime; unsigned long st_atime_nsec; unsigned long st_mtime; unsigned int st_mtime_nsec; unsigned long st_ctime; unsigned long st_ctime_nsec; unsigned long long st_ino; }; #else /* __i386__ */ struct stat { unsigned long st_dev; unsigned long st_ino; unsigned long st_nlink; unsigned int st_mode; unsigned int st_uid; unsigned int st_gid; unsigned int __pad0; unsigned long st_rdev; long st_size; long st_blksize; long st_blocks; /* Number 512-byte blocks allocated. */ unsigned long st_atime; unsigned long st_atime_nsec; unsigned long st_mtime; unsigned long st_mtime_nsec; unsigned long st_ctime; unsigned long st_ctime_nsec; long __unused[3]; }; #endif /* for 32bit emulation and 32 bit kernels */ struct __old_kernel_stat { unsigned short st_dev; unsigned short st_ino; unsigned short st_mode; unsigned short st_nlink; unsigned short st_uid; unsigned short st_gid; unsigned short st_rdev; #ifdef __i386__ unsigned long st_size; unsigned long st_atime; unsigned long st_mtime; unsigned long st_ctime; #else unsigned int st_size; unsigned int st_atime; unsigned int st_mtime; unsigned int st_ctime; #endif }; #endif /* _ASM_X86_STAT_H */ PKg[UÄ2ÆÆ siginfo.hnuW+A„¶#ifndef _ASM_X86_SIGINFO_H #define _ASM_X86_SIGINFO_H #ifdef __x86_64__ # define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) #endif #include #endif /* _ASM_X86_SIGINFO_H */ PKg[†oPdRRunistd.hnuW+A„¶# ifdef __i386__ # include "unistd_32.h" # else # include "unistd_64.h" # endif PKg[±2¨¨ptrace.hnuW+A„¶#ifndef _ASM_X86_PTRACE_H #define _ASM_X86_PTRACE_H /* For */ #include #include #ifndef __ASSEMBLY__ #ifdef __i386__ /* this struct defines the way the registers are stored on the stack during a system call. */ struct pt_regs { long ebx; long ecx; long edx; long esi; long edi; long ebp; long eax; int xds; int xes; int xfs; int xgs; long orig_eax; long eip; int xcs; long eflags; long esp; int xss; }; #else /* __i386__ */ struct pt_regs { unsigned long r15; unsigned long r14; unsigned long r13; unsigned long r12; unsigned long rbp; unsigned long rbx; /* arguments: non interrupts/non tracing syscalls only save upto here*/ unsigned long r11; unsigned long r10; unsigned long r9; unsigned long r8; unsigned long rax; unsigned long rcx; unsigned long rdx; unsigned long rsi; unsigned long rdi; unsigned long orig_rax; /* end of arguments */ /* cpu exception frame or undefined */ unsigned long rip; unsigned long cs; unsigned long eflags; unsigned long rsp; unsigned long ss; /* top of stack page */ }; #endif /* !__i386__ */ #endif /* !__ASSEMBLY__ */ #endif /* _ASM_X86_PTRACE_H */ PKg[•áys››swab.hnuW+A„¶#ifndef _ASM_X86_SWAB_H #define _ASM_X86_SWAB_H #include static __inline__ __u32 __arch_swab32(__u32 val) { #ifdef __i386__ # ifdef CONFIG_X86_BSWAP __asm__("bswap %0" : "=r" (val) : "0" (val)); # else __asm__("xchgb %b0,%h0\n\t" /* swap lower bytes */ "rorl $16,%0\n\t" /* swap words */ "xchgb %b0,%h0" /* swap higher bytes */ : "=q" (val) : "0" (val)); # endif #else /* __i386__ */ __asm__("bswapl %0" : "=r" (val) : "0" (val)); #endif return val; } #define __arch_swab32 __arch_swab32 static __inline__ __u64 __arch_swab64(__u64 val) { #ifdef __i386__ union { struct { __u32 a; __u32 b; } s; __u64 u; } v; v.u = val; # ifdef CONFIG_X86_BSWAP __asm__("bswapl %0 ; bswapl %1 ; xchgl %0,%1" : "=r" (v.s.a), "=r" (v.s.b) : "0" (v.s.a), "1" (v.s.b)); # else v.s.a = __arch_swab32(v.s.a); v.s.b = __arch_swab32(v.s.b); __asm__("xchgl %0,%1" : "=r" (v.s.a), "=r" (v.s.b) : "0" (v.s.a), "1" (v.s.b)); # endif return v.u; #else /* __i386__ */ __asm__("bswapq %0" : "=r" (val) : "0" (val)); return val; #endif } #define __arch_swab64 __arch_swab64 #endif /* _ASM_X86_SWAB_H */ PKg[´Ætmboot.hnuW+A„¶#ifndef _ASM_X86_BOOT_H #define _ASM_X86_BOOT_H /* Internal svga startup constants */ #define NORMAL_VGA 0xffff /* 80x25 mode */ #define EXTENDED_VGA 0xfffe /* 80x50 mode */ #define ASK_VGA 0xfffd /* ask for it at bootup */ #endif /* _ASM_X86_BOOT_H */ PKg[Ÿx"" resource.hnuW+A„¶#include PKg[ÛÁ|¾¾prctl.hnuW+A„¶#ifndef _ASM_X86_PRCTL_H #define _ASM_X86_PRCTL_H #define ARCH_SET_GS 0x1001 #define ARCH_SET_FS 0x1002 #define ARCH_GET_FS 0x1003 #define ARCH_GET_GS 0x1004 #endif /* _ASM_X86_PRCTL_H */ PKg[ˆÞn‚param.hnuW+A„¶#include PKg[8àýauxvec.hnuW+A„¶#ifndef _ASM_X86_AUXVEC_H #define _ASM_X86_AUXVEC_H /* * Architecture-neutral AT_ values in 0-17, leave some room * for more of them, start the x86-specific ones at 32. */ #ifdef __i386__ #define AT_SYSINFO 32 #endif #define AT_SYSINFO_EHDR 33 #endif /* _ASM_X86_AUXVEC_H */ PKg[øÔ8?yymce.hnuW+A„¶#ifndef _ASM_X86_MCE_H #define _ASM_X86_MCE_H #include #include /* * Machine Check support for x86 */ /* MCG_CAP register defines */ #define MCG_BANKCNT_MASK 0xff /* Number of Banks */ #define MCG_CTL_P (1ULL<<8) /* MCG_CTL register available */ #define MCG_EXT_P (1ULL<<9) /* Extended registers available */ #define MCG_CMCI_P (1ULL<<10) /* CMCI supported */ #define MCG_EXT_CNT_MASK 0xff0000 /* Number of Extended registers */ #define MCG_EXT_CNT_SHIFT 16 #define MCG_EXT_CNT(c) (((c) & MCG_EXT_CNT_MASK) >> MCG_EXT_CNT_SHIFT) #define MCG_SER_P (1ULL<<24) /* MCA recovery/new status bits */ #define MCG_ELOG_P (1ULL<<26) /* Extended error log supported */ /* MCG_STATUS register defines */ #define MCG_STATUS_RIPV (1ULL<<0) /* restart ip valid */ #define MCG_STATUS_EIPV (1ULL<<1) /* ip points to correct instruction */ #define MCG_STATUS_MCIP (1ULL<<2) /* machine check in progress */ /* MCi_STATUS register defines */ #define MCI_STATUS_VAL (1ULL<<63) /* valid error */ #define MCI_STATUS_OVER (1ULL<<62) /* previous errors lost */ #define MCI_STATUS_UC (1ULL<<61) /* uncorrected error */ #define MCI_STATUS_EN (1ULL<<60) /* error enabled */ #define MCI_STATUS_MISCV (1ULL<<59) /* misc error reg. valid */ #define MCI_STATUS_ADDRV (1ULL<<58) /* addr reg. valid */ #define MCI_STATUS_PCC (1ULL<<57) /* processor context corrupt */ #define MCI_STATUS_S (1ULL<<56) /* Signaled machine check */ #define MCI_STATUS_AR (1ULL<<55) /* Action required */ /* * Note that the full MCACOD field of IA32_MCi_STATUS MSR is * bits 15:0. But bit 12 is the 'F' bit, defined for corrected * errors to indicate that errors are being filtered by hardware. * We should mask out bit 12 when looking for specific signatures * of uncorrected errors - so the F bit is deliberately skipped * in this #define. */ #define MCACOD 0xefff /* MCA Error Code */ /* Architecturally defined codes from SDM Vol. 3B Chapter 15 */ #define MCACOD_SCRUB 0x00C0 /* 0xC0-0xCF Memory Scrubbing */ #define MCACOD_SCRUBMSK 0xeff0 /* Skip bit 12 ('F' bit) */ #define MCACOD_L3WB 0x017A /* L3 Explicit Writeback */ #define MCACOD_DATA 0x0134 /* Data Load */ #define MCACOD_INSTR 0x0150 /* Instruction Fetch */ /* MCi_MISC register defines */ #define MCI_MISC_ADDR_LSB(m) ((m) & 0x3f) #define MCI_MISC_ADDR_MODE(m) (((m) >> 6) & 7) #define MCI_MISC_ADDR_SEGOFF 0 /* segment offset */ #define MCI_MISC_ADDR_LINEAR 1 /* linear address */ #define MCI_MISC_ADDR_PHYS 2 /* physical address */ #define MCI_MISC_ADDR_MEM 3 /* memory address */ #define MCI_MISC_ADDR_GENERIC 7 /* generic */ /* CTL2 register defines */ #define MCI_CTL2_CMCI_EN (1ULL << 30) #define MCI_CTL2_CMCI_THRESHOLD_MASK 0x7fffULL #define MCJ_CTX_MASK 3 #define MCJ_CTX(flags) ((flags) & MCJ_CTX_MASK) #define MCJ_CTX_RANDOM 0 /* inject context: random */ #define MCJ_CTX_PROCESS 1 /* inject context: process */ #define MCJ_CTX_IRQ 2 /* inject context: IRQ */ #define MCJ_NMI_BROADCAST 4 /* do NMI broadcasting */ #define MCJ_EXCEPTION 8 /* raise as exception */ /* Fields are zero when not available */ struct mce { __u64 status; __u64 misc; __u64 addr; __u64 mcgstatus; __u64 ip; __u64 tsc; /* cpu time stamp counter */ __u64 time; /* wall time_t when error was detected */ __u8 cpuvendor; /* cpu vendor as encoded in system.h */ __u8 inject_flags; /* software inject flags */ __u16 pad; __u32 cpuid; /* CPUID 1 EAX */ __u8 cs; /* code segment */ __u8 bank; /* machine check bank */ __u8 cpu; /* cpu number; obsolete; use extcpu now */ __u8 finished; /* entry is valid */ __u32 extcpu; /* linux cpu number that detected the error */ __u32 socketid; /* CPU socket ID */ __u32 apicid; /* CPU initial apic ID */ __u64 mcgcap; /* MCGCAP MSR: machine check capabilities of CPU */ }; /* * This structure contains all data related to the MCE log. Also * carries a signature to make it easier to find from external * debugging tools. Each entry is only valid when its finished flag * is set. */ #define MCE_LOG_LEN 32 struct mce_log { char signature[12]; /* "MACHINECHECK" */ unsigned len; /* = MCE_LOG_LEN */ unsigned next; unsigned flags; unsigned recordlen; /* length of struct mce */ struct mce entry[MCE_LOG_LEN]; }; #define MCE_OVERFLOW 0 /* bit 0 in flags means overflow */ #define MCE_LOG_SIGNATURE "MACHINECHECK" #define MCE_GET_RECORD_LEN _IOR('M', 1, int) #define MCE_GET_LOG_LEN _IOR('M', 2, int) #define MCE_GETCLEAR_FLAGS _IOR('M', 3, int) /* Software defined banks */ #define MCE_EXTENDED_BANK 128 #define MCE_THERMAL_BANK MCE_EXTENDED_BANK + 0 #define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1) /* MCE_AMD */ #define K8_MCE_THRESHOLD_BANK_0 (MCE_THRESHOLD_BASE + 0 * 9) #define K8_MCE_THRESHOLD_BANK_1 (MCE_THRESHOLD_BASE + 1 * 9) #define K8_MCE_THRESHOLD_BANK_2 (MCE_THRESHOLD_BASE + 2 * 9) #define K8_MCE_THRESHOLD_BANK_3 (MCE_THRESHOLD_BASE + 3 * 9) #define K8_MCE_THRESHOLD_BANK_4 (MCE_THRESHOLD_BASE + 4 * 9) #define K8_MCE_THRESHOLD_BANK_5 (MCE_THRESHOLD_BASE + 5 * 9) #define K8_MCE_THRESHOLD_DRAM_ECC (MCE_THRESHOLD_BANK_4 + 0) #endif /* _ASM_X86_MCE_H */ PKg[ž?(ŽŽsignal.hnuW+A„¶#ifndef _ASM_X86_SIGNAL_H #define _ASM_X86_SIGNAL_H #ifndef __ASSEMBLY__ #include #include /* Avoid too many header ordering problems. */ struct siginfo; /* Here we must cater to libcs that poke about in kernel headers. */ #define NSIG 32 typedef unsigned long sigset_t; #endif /* __ASSEMBLY__ */ #define SIGHUP 1 #define SIGINT 2 #define SIGQUIT 3 #define SIGILL 4 #define SIGTRAP 5 #define SIGABRT 6 #define SIGIOT 6 #define SIGBUS 7 #define SIGFPE 8 #define SIGKILL 9 #define SIGUSR1 10 #define SIGSEGV 11 #define SIGUSR2 12 #define SIGPIPE 13 #define SIGALRM 14 #define SIGTERM 15 #define SIGSTKFLT 16 #define SIGCHLD 17 #define SIGCONT 18 #define SIGSTOP 19 #define SIGTSTP 20 #define SIGTTIN 21 #define SIGTTOU 22 #define SIGURG 23 #define SIGXCPU 24 #define SIGXFSZ 25 #define SIGVTALRM 26 #define SIGPROF 27 #define SIGWINCH 28 #define SIGIO 29 #define SIGPOLL SIGIO /* #define SIGLOST 29 */ #define SIGPWR 30 #define SIGSYS 31 #define SIGUNUSED 31 /* These should not be considered constants from userland. */ #define SIGRTMIN 32 #define SIGRTMAX _NSIG /* * SA_FLAGS values: * * SA_ONSTACK indicates that a registered stack_t will be used. * SA_RESTART flag to get restarting signals (which were the default long ago) * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. * SA_RESETHAND clears the handler when the signal is delivered. * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. * SA_NODEFER prevents the current signal from being masked in the handler. * * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single * Unix names RESETHAND and NODEFER respectively. */ #define SA_NOCLDSTOP 0x00000001u #define SA_NOCLDWAIT 0x00000002u #define SA_SIGINFO 0x00000004u #define SA_ONSTACK 0x08000000u #define SA_RESTART 0x10000000u #define SA_NODEFER 0x40000000u #define SA_RESETHAND 0x80000000u #define SA_NOMASK SA_NODEFER #define SA_ONESHOT SA_RESETHAND #define SA_RESTORER 0x04000000 /* * sigaltstack controls */ #define SS_ONSTACK 1 #define SS_DISABLE 2 #define MINSIGSTKSZ 2048 #define SIGSTKSZ 8192 #include #ifndef __ASSEMBLY__ #ifdef __i386__ /* Here we must cater to libcs that poke about in kernel headers. */ struct sigaction { union { __sighandler_t _sa_handler; void (*_sa_sigaction)(int, struct siginfo *, void *); } _u; sigset_t sa_mask; unsigned long sa_flags; void (*sa_restorer)(void); }; #define sa_handler _u._sa_handler #define sa_sigaction _u._sa_sigaction #else /* __i386__ */ struct sigaction { __sighandler_t sa_handler; unsigned long sa_flags; __sigrestore_t sa_restorer; sigset_t sa_mask; /* mask last for extensibility */ }; struct k_sigaction { struct sigaction sa; }; #endif /* !__i386__ */ typedef struct sigaltstack { void *ss_sp; int ss_flags; size_t ss_size; } stack_t; #endif /* __ASSEMBLY__ */ #endif /* _ASM_X86_SIGNAL_H */ PKg[¤žs(aastatfs.hnuW+A„¶#ifndef _ASM_X86_STATFS_H #define _ASM_X86_STATFS_H /* * We need compat_statfs64 to be packed, because the i386 ABI won't * add padding at the end to bring it to a multiple of 8 bytes, but * the x86_64 ABI will. */ #define ARCH_PACK_COMPAT_STATFS64 __attribute__((packed,aligned(4))) #include #endif /* _ASM_X86_STATFS_H */ PKg[^ÛB´"" termbits.hnuW+A„¶#include PKg[‹z±ist.hnuW+A„¶#ifndef _ASM_X86_IST_H #define _ASM_X86_IST_H /* * Include file for the interface to IST BIOS * Copyright 2002 Andy Grover * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2, or (at your option) any * later version. * * This program is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. */ #include struct ist_info { __u32 signature; __u32 command; __u32 event; __u32 perf_level; }; #endif /* _ASM_X86_IST_H */ PKg[˜XL$$posix_types_32.hnuW+A„¶#ifndef _ASM_X86_POSIX_TYPES_32_H #define _ASM_X86_POSIX_TYPES_32_H /* * This file is generally used by user-level software, so you need to * be a little careful about namespace pollution etc. Also, we cannot * assume GCC is being used. */ typedef unsigned long __kernel_ino_t; typedef unsigned short __kernel_mode_t; typedef unsigned short __kernel_nlink_t; typedef long __kernel_off_t; typedef int __kernel_pid_t; typedef unsigned short __kernel_ipc_pid_t; typedef unsigned short __kernel_uid_t; typedef unsigned short __kernel_gid_t; typedef unsigned int __kernel_size_t; typedef int __kernel_ssize_t; typedef int __kernel_ptrdiff_t; typedef long __kernel_time_t; typedef long __kernel_suseconds_t; typedef long __kernel_clock_t; typedef int __kernel_timer_t; typedef int __kernel_clockid_t; typedef int __kernel_daddr_t; typedef char * __kernel_caddr_t; typedef unsigned short __kernel_uid16_t; typedef unsigned short __kernel_gid16_t; typedef unsigned int __kernel_uid32_t; typedef unsigned int __kernel_gid32_t; typedef unsigned short __kernel_old_uid_t; typedef unsigned short __kernel_old_gid_t; typedef unsigned short __kernel_old_dev_t; #ifdef __GNUC__ typedef long long __kernel_loff_t; #endif typedef struct { int val[2]; } __kernel_fsid_t; #endif /* _ASM_X86_POSIX_TYPES_32_H */ PKg[Ú³óÜposix_types_64.hnuW+A„¶#ifndef _ASM_X86_POSIX_TYPES_64_H #define _ASM_X86_POSIX_TYPES_64_H /* * This file is generally used by user-level software, so you need to * be a little careful about namespace pollution etc. Also, we cannot * assume GCC is being used. */ typedef unsigned long __kernel_ino_t; typedef unsigned int __kernel_mode_t; typedef unsigned long __kernel_nlink_t; typedef long __kernel_off_t; typedef int __kernel_pid_t; typedef int __kernel_ipc_pid_t; typedef unsigned int __kernel_uid_t; typedef unsigned int __kernel_gid_t; typedef unsigned long __kernel_size_t; typedef long __kernel_ssize_t; typedef long __kernel_ptrdiff_t; typedef long __kernel_time_t; typedef long __kernel_suseconds_t; typedef long __kernel_clock_t; typedef int __kernel_timer_t; typedef int __kernel_clockid_t; typedef int __kernel_daddr_t; typedef char * __kernel_caddr_t; typedef unsigned short __kernel_uid16_t; typedef unsigned short __kernel_gid16_t; #ifdef __GNUC__ typedef long long __kernel_loff_t; #endif typedef struct { int val[2]; } __kernel_fsid_t; typedef unsigned short __kernel_old_uid_t; typedef unsigned short __kernel_old_gid_t; typedef __kernel_uid_t __kernel_uid32_t; typedef __kernel_gid_t __kernel_gid32_t; typedef unsigned long __kernel_old_dev_t; #endif /* _ASM_X86_POSIX_TYPES_64_H */ PKg[`)ä@‰‰byteorder.hnuW+A„¶#ifndef _ASM_X86_BYTEORDER_H #define _ASM_X86_BYTEORDER_H #include #endif /* _ASM_X86_BYTEORDER_H */ PKg[œ¿¾Ù””sigcontext32.hnuW+A„¶#ifndef _ASM_X86_SIGCONTEXT32_H #define _ASM_X86_SIGCONTEXT32_H #include /* signal context for 32bit programs. */ #define X86_FXSR_MAGIC 0x0000 struct _fpreg { unsigned short significand[4]; unsigned short exponent; }; struct _fpxreg { unsigned short significand[4]; unsigned short exponent; unsigned short padding[3]; }; struct _xmmreg { __u32 element[4]; }; /* FSAVE frame with extensions */ struct _fpstate_ia32 { /* Regular FPU environment */ __u32 cw; __u32 sw; __u32 tag; /* not compatible to 64bit twd */ __u32 ipoff; __u32 cssel; __u32 dataoff; __u32 datasel; struct _fpreg _st[8]; unsigned short status; unsigned short magic; /* 0xffff = regular FPU data only */ /* FXSR FPU environment */ __u32 _fxsr_env[6]; __u32 mxcsr; __u32 reserved; struct _fpxreg _fxsr_st[8]; struct _xmmreg _xmm[8]; /* It's actually 16 */ __u32 padding[44]; union { __u32 padding2[12]; struct _fpx_sw_bytes sw_reserved; }; }; struct sigcontext_ia32 { unsigned short gs, __gsh; unsigned short fs, __fsh; unsigned short es, __esh; unsigned short ds, __dsh; unsigned int di; unsigned int si; unsigned int bp; unsigned int sp; unsigned int bx; unsigned int dx; unsigned int cx; unsigned int ax; unsigned int trapno; unsigned int err; unsigned int ip; unsigned short cs, __csh; unsigned int flags; unsigned int sp_at_signal; unsigned short ss, __ssh; unsigned int fpstate; /* really (struct _fpstate_ia32 *) */ unsigned int oldmask; unsigned int cr2; }; #endif /* _ASM_X86_SIGCONTEXT32_H */ PKg[,Mm‚HHprocessor-flags.hnuW+A„¶#ifndef _ASM_X86_PROCESSOR_FLAGS_H #define _ASM_X86_PROCESSOR_FLAGS_H /* Various flags defined: can be included from assembler. */ /* * EFLAGS bits */ #define X86_EFLAGS_CF 0x00000001 /* Carry Flag */ #define X86_EFLAGS_PF 0x00000004 /* Parity Flag */ #define X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */ #define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */ #define X86_EFLAGS_SF 0x00000080 /* Sign Flag */ #define X86_EFLAGS_TF 0x00000100 /* Trap Flag */ #define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */ #define X86_EFLAGS_DF 0x00000400 /* Direction Flag */ #define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */ #define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */ #define X86_EFLAGS_NT 0x00004000 /* Nested Task */ #define X86_EFLAGS_RF 0x00010000 /* Resume Flag */ #define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */ #define X86_EFLAGS_AC 0x00040000 /* Alignment Check */ #define X86_EFLAGS_VIF 0x00080000 /* Virtual Interrupt Flag */ #define X86_EFLAGS_VIP 0x00100000 /* Virtual Interrupt Pending */ #define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */ /* * Basic CPU control in CR0 */ #define X86_CR0_PE 0x00000001 /* Protection Enable */ #define X86_CR0_MP 0x00000002 /* Monitor Coprocessor */ #define X86_CR0_EM 0x00000004 /* Emulation */ #define X86_CR0_TS 0x00000008 /* Task Switched */ #define X86_CR0_ET 0x00000010 /* Extension Type */ #define X86_CR0_NE 0x00000020 /* Numeric Error */ #define X86_CR0_WP 0x00010000 /* Write Protect */ #define X86_CR0_AM 0x00040000 /* Alignment Mask */ #define X86_CR0_NW 0x20000000 /* Not Write-through */ #define X86_CR0_CD 0x40000000 /* Cache Disable */ #define X86_CR0_PG 0x80000000 /* Paging */ /* * Paging options in CR3 */ #define X86_CR3_PWT 0x00000008 /* Page Write Through */ #define X86_CR3_PCD 0x00000010 /* Page Cache Disable */ #define X86_CR3_PCID_NOFLUSH_BIT 63 /* Preserve old PCID */ #define X86_CR3_PCID_NOFLUSH _BITULL(X86_CR3_PCID_NOFLUSH_BIT) /* * Intel CPU features in CR4 */ #define X86_CR4_VME 0x00000001 /* enable vm86 extensions */ #define X86_CR4_PVI 0x00000002 /* virtual interrupts flag enable */ #define X86_CR4_TSD 0x00000004 /* disable time stamp at ipl 3 */ #define X86_CR4_DE 0x00000008 /* enable debugging extensions */ #define X86_CR4_PSE 0x00000010 /* enable page size extensions */ #define X86_CR4_PAE 0x00000020 /* enable physical address extensions */ #define X86_CR4_MCE 0x00000040 /* Machine check enable */ #define X86_CR4_PGE 0x00000080 /* enable global pages */ #define X86_CR4_PCE 0x00000100 /* enable performance counters at ipl 3 */ #define X86_CR4_OSFXSR 0x00000200 /* enable fast FPU save and restore */ #define X86_CR4_OSXMMEXCPT 0x00000400 /* enable unmasked SSE exceptions */ #define X86_CR4_VMXE 0x00002000 /* enable VMX virtualization */ #define X86_CR4_RDWRGSFS 0x00010000 /* enable RDWRGSFS support */ #define X86_CR4_PCIDE 0x00020000 /* enable PCID support */ #define X86_CR4_OSXSAVE 0x00040000 /* enable xsave and xrestore */ #define X86_CR4_SMEP 0x00100000 /* enable SMEP support */ /* * x86-64 Task Priority Register, CR8 */ #define X86_CR8_TPR 0x0000000F /* task priority register */ /* * AMD and Transmeta use MSRs for configuration; see */ /* * NSC/Cyrix CPU configuration register indexes */ #define CX86_PCR0 0x20 #define CX86_GCR 0xb8 #define CX86_CCR0 0xc0 #define CX86_CCR1 0xc1 #define CX86_CCR2 0xc2 #define CX86_CCR3 0xc3 #define CX86_CCR4 0xe8 #define CX86_CCR5 0xe9 #define CX86_CCR6 0xea #define CX86_CCR7 0xeb #define CX86_PCR1 0xf0 #define CX86_DIR0 0xfe #define CX86_DIR1 0xff #define CX86_ARR_BASE 0xc4 #define CX86_RCR_BASE 0xdc #endif /* _ASM_X86_PROCESSOR_FLAGS_H */ PKg[ÁÆ ªªmman.hnuW+A„¶#ifndef _ASM_X86_MMAN_H #define _ASM_X86_MMAN_H #define MAP_32BIT 0x40 /* only give out 32bit addresses */ #include #endif /* _ASM_X86_MMAN_H */ PKg[Ï<àÄrrtypes.hnuW+A„¶#ifndef _ASM_X86_TYPES_H #define _ASM_X86_TYPES_H #include #endif /* _ASM_X86_TYPES_H */ PKg[Ž¤*ÛÛldt.hnuW+A„¶/* * ldt.h * * Definitions of structures used with the modify_ldt system call. */ #ifndef _ASM_X86_LDT_H #define _ASM_X86_LDT_H /* Maximum number of LDT entries supported. */ #define LDT_ENTRIES 8192 /* The size of each LDT entry. */ #define LDT_ENTRY_SIZE 8 #ifndef __ASSEMBLY__ /* * Note on 64bit base and limit is ignored and you cannot set DS/ES/CS * not to the default values if you still want to do syscalls. This * call is more for 32bit mode therefore. */ struct user_desc { unsigned int entry_number; unsigned int base_addr; unsigned int limit; unsigned int seg_32bit:1; unsigned int contents:2; unsigned int read_exec_only:1; unsigned int limit_in_pages:1; unsigned int seg_not_present:1; unsigned int useable:1; #ifdef __x86_64__ /* * Because this bit is not present in 32-bit user code, user * programs can pass uninitialized values here. Therefore, in * any context in which a user_desc comes from a 32-bit program, * the kernel must act as though lm == 0, regardless of the * actual value. */ unsigned int lm:1; #endif }; #define MODIFY_LDT_CONTENTS_DATA 0 #define MODIFY_LDT_CONTENTS_STACK 1 #define MODIFY_LDT_CONTENTS_CODE 2 #endif /* !__ASSEMBLY__ */ #endif /* _ASM_X86_LDT_H */ PKg[¥CûÖ\\ posix_types.hnuW+A„¶# ifdef __i386__ # include "posix_types_32.h" # else # include "posix_types_64.h" # endif PKg[×1ÎHµµa.out.hnuW+A„¶#ifndef _ASM_X86_A_OUT_H #define _ASM_X86_A_OUT_H struct exec { unsigned int a_info; /* Use macros N_MAGIC, etc for access */ unsigned a_text; /* length of text, in bytes */ unsigned a_data; /* length of data, in bytes */ unsigned a_bss; /* length of uninitialized data area for file, in bytes */ unsigned a_syms; /* length of symbol table data in file, in bytes */ unsigned a_entry; /* start address */ unsigned a_trsize; /* length of relocation info for text, in bytes */ unsigned a_drsize; /* length of relocation info for data, in bytes */ }; #define N_TRSIZE(a) ((a).a_trsize) #define N_DRSIZE(a) ((a).a_drsize) #define N_SYMSIZE(a) ((a).a_syms) #endif /* _ASM_X86_A_OUT_H */ PKg[©‹4qÓÓe820.hnuW+A„¶#ifndef _ASM_X86_E820_H #define _ASM_X86_E820_H #define E820MAP 0x2d0 /* our map */ #define E820MAX 128 /* number of entries in E820MAP */ /* * Legacy E820 BIOS limits us to 128 (E820MAX) nodes due to the * constrained space in the zeropage. If we have more nodes than * that, and if we've booted off EFI firmware, then the EFI tables * passed us from the EFI firmware can list more nodes. Size our * internal memory map tables to have room for these additional * nodes, based on up to three entries per node for which the * kernel was built: MAX_NUMNODES == (1 << CONFIG_NODES_SHIFT), * plus E820MAX, allowing space for the possible duplicate E820 * entries that might need room in the same arrays, prior to the * call to sanitize_e820_map() to remove duplicates. The allowance * of three memory map entries per node is "enough" entries for * the initial hardware platform motivating this mechanism to make * use of additional EFI map entries. Future platforms may want * to allow more than three entries per node or otherwise refine * this size. */ /* * Odd: 'make headers_check' complains about numa.h if I try * to collapse the next two #ifdef lines to a single line: * #if defined(__KERNEL__) && defined(CONFIG_EFI) */ #define E820_X_MAX E820MAX #define E820NR 0x1e8 /* # entries in E820MAP */ #define E820_RAM 1 #define E820_RESERVED 2 #define E820_ACPI 3 #define E820_NVS 4 #define E820_UNUSABLE 5 /* * reserved RAM used by kernel itself * if CONFIG_INTEL_TXT is enabled, memory of this type will be * included in the S3 integrity calculation and so should not include * any memory that BIOS might alter over the S3 transition */ #define E820_RESERVED_KERN 128 #ifndef __ASSEMBLY__ #include struct e820entry { __u64 addr; /* start of memory segment */ __u64 size; /* size of memory segment */ __u32 type; /* type of memory segment */ } __attribute__((packed)); struct e820map { __u32 nr_map; struct e820entry map[E820_X_MAX]; }; #define ISA_START_ADDRESS 0xa0000 #define ISA_END_ADDRESS 0x100000 #define BIOS_BEGIN 0x000a0000 #define BIOS_END 0x00100000 #define BIOS_ROM_BASE 0xffe00000 #define BIOS_ROM_END 0xffffffff #endif /* __ASSEMBLY__ */ #endif /* _ASM_X86_E820_H */ PKg[²€™ã!! sockios.hnuW+A„¶#include PKg[wb³è shmbuf.hnuW+A„¶#include PKg[¾ÈRššbootparam.hnuW+A„¶#ifndef _ASM_X86_BOOTPARAM_H #define _ASM_X86_BOOTPARAM_H #include #include #include #include #include #include #include